Wildguzzi.com
General Category => General Discussion => Topic started by: Zenermaniac on April 10, 2024, 08:57:47 PM
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I should have done this a couple of years ago when a few here were exploring the MIUG3 programming but life got in the way. I have a little more time to explore it, now. I’m far from finished and there is further tracing to be done. I’m hoping to do more without removing the board for now. The harness socket is silicone glued to the throttle body and I would have to unsolder the plug which could be destructive. It’s bricked but I want to keep it intact in case someone figures a way to recover it, someday.
I had expected to maybe find a cermet or carbon pot for the throttle position sensor but found a Hall effect device sensing a magnet on the throttle shaft. That should last forever.
Here is the circuit board with notes I have so far.
(https://i.ibb.co/hHww222/IMG-8032.png) (https://ibb.co/hHww222)
The two main components are the CPU (SAK-XC2765X-104F80LR) and a multifunction drivers chip (LR177).
The LR177 notes I’ve made so far:
(https://i.ibb.co/R4fjzpF/IMG-8030.jpg) (https://ibb.co/R4fjzpF)
free image
hosting (https://imgbb.com/)
The CPU block diagram is this:
(https://i.ibb.co/2F3Rhs5/IMG-8031.jpg) (https://ibb.co/2F3Rhs5)
Details of the CPU architecture and programming can be found at https://www.infineon.com/dgdl/Infineon-SAK-XC2765X-104F80LR%20AB-DataSheet-v02_12-EN.pdf?fileId=5546d4626b2d8e69016b473b7ca03417.
The CPU has areas of flash and other RAM and there is also an EEPROM on the board. I’m curious to know if the flash has bootstrap code and the .bin map and fault codes, etc resides in the EEPROM. More to follow as I find time if anyone is interested.
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I only know enough to keep up with the conversation, but I love to see this kind of thing. Forensic electronics !
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I don't know if these will do you any good, but...
https://guzzitek.org/documents/injection/ECU_MIU-G3_Training.pdf
https://wildguzzi.com/forum/index.php?topic=110952.0
Thanks for your info :thumb: :thumb:
Tom
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Continued-
The MIUG3’s CPU has 76 I/O lines arranged in groups called ports. There are 7 I/O ports and 2 input ports. All lines are separately addressable. Anyone looking at the programming should find the following useful.
(https://i.ibb.co/JQfVj6r/IMG-8046.png) (https://ibb.co/JQfVj6r)
I’ve revised two previous diagrams as follows:
(https://i.ibb.co/89Pc7Sk/IMG-8047.png) (https://ibb.co/89Pc7Sk)
(https://i.ibb.co/mqvrLQj/IMG-8048.png) (https://ibb.co/mqvrLQj)
More as I figure it out.